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Layout-Designs of Integrated Circuits Protection Act (consolidated text of August 31, 2023), Estonia
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Latest Version in WIPO Lex
Details
Details
Year of Version
2023
Dates
Consolidated:
August 31, 2023
Entry into force:
March 16, 1999
Adopted:
November 25, 1998
Type of Text
Main IP Laws
Subject Matter
Layout Designs of Integrated Circuits
Subject Matter (secondary)
Undisclosed Information (Trade Secrets),
Enforcement of IP and Related Laws,
IP Regulatory Body
Available Materials
Main Text(s)
Related Text(s)
Main text(s)
Main text(s)
Estonian
Mikrolülituse topoloogia kaitse seadus (konsolideeritud tekst 31.08.2023)
Legislation
Implements (2 text(s))
Implements (2 text(s))
Supersedes (6 text(s))
Supersedes (6 text(s))
- Layout-Designs of Integrated Circuits Protection Act (consolidated text of April 1, 2019) (EE230)
- Regulation No. 14 of the Minister of Agriculture of April 20, 1999, on the Endorsement of Categories of Seed Potato, and Procedures for Accreditation of Laboratories Producing Seed Potatoes, and Packaging, Marketing and Importation of Seed Potatoes (consolidated text of September 15, 2003) (EE237)
- Layout-Designs of Integrated Circuits Protection Act (consolidated text of January 1, 2015) (EE156)
- Layout-Designs of Integrated Circuits Protection Act (consolidated text of January 1, 2012) (EE121)
- Layout-Designs of Integrated Circuits Protection Act (EE008)
- Regulation No. 14 of the Minister of Agriculture of April 20, 1999, on the Endorsement of Categories of Seed Potato, and Procedures for Accreditation of Laboratories Producing Seed Potatoes, and Packaging, Marketing and Importation of Seed Potatoes (EE046)
Is amended by (1 text(s))
Is amended by (1 text(s))
Is implemented by (3 text(s))
Is implemented by (3 text(s))
Treaties
Relates to (3 records)
Relates to (3 records)
No data available.
WIPO Lex No.
EE247